AFE7769
HF-Transceiver mit 4 Sende-, 4 Empfangskanälen, 2 Rückkopplungen, 600 MHz bis 6 GHz, vier PLLs, f
AFE7769
- Quad transmitters based on direct up-conversion architecture:
- Up to 600 MHz of RF transmitted bandwidth per chain
- Quad receivers based on 0-IF down-conversion architecture:
- Up to 200 MHz of RF received bandwidth per chain
- Feedback chain based on RF sampling ADC:
- Up to 600 MHz of RF received bandwidth
- RF frequency range: 600 MHz to 6 GHz
- Four wideband fractional-N PLL, VCO for TX and RX LO
- Dedicated integer-N PLL, VCO for data converters clock generation
- JESD204B and JESD204C SerDes interface support:
- 8 SerDes transceivers up to 29.5 Gbps
- 8b/10b and 64b/66b encoding
- 16-bit, 12-bit, 24-bit and 32-bit formatting
- Subclass 1 multi-device synchronization
- Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch
The AFE7769 device is a high-performance, multichannel transceiver, integrating four direct up-conversion transmitter chains, four direct down-conversion receiver chains, and two wideband RF sampling digitizing auxiliary chains (feedback paths). The high dynamic range of the transmitter and receiver chains enables wireless base stations to generate and receive 2G, 3G, 4G, and 5G signals.
The low power dissipation and large channel integration of the AFE7769 allows the device to address the power and size constraints of 4G and 5G massive MIMO base stations. The wideband and high dynamic range feedback path can assist the Digital Pre-Distortion (DPD) of the power amplifiers in the transmitter chain. The fast SerDes speed can help reduce the number of lanes required to transfer the data in and out.
Each receiver chain of the AFE7769 includes a 28-dB range digital step attenuator (DSA), followed by a wideband passive IQ demodulator, and a baseband amplifier with integrated programmable antialiasing low pass filters, driving a continuous-time sigma-delta ADC. The RX chain can receive an instantaneous bandwidth (IBW) up to 200 MHz. Each receiver channel has two analog peak power detectors and various digital power detectors to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline calibration.
Each transmitter chain includes two 14-bit, 3-Gsps IQ DACs, followed by a programmable reconstruction and DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track and correct for the TX chain IQ mismatch and LO leakage.
Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3-Gsps RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the calibration of the TX chains impairments. The FB path integrates two independent NCO that allows a fast switching between two observed RF input bands.
The synthesizer section integrates four fractional-N RF PLL that can generate four different RF LO, allowing the device to support up to two different bands, each one configured as two transmitters, two receivers and one feedback paths.

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Technische Dokumentation
Typ | Titel | Datum | ||
---|---|---|---|---|
* | Data sheet | AFE7769 Quad-Channel RF Transceiver With Feedback Path datasheet | PDF | HTML | 08 Aug 2019 |
User guide | Interfacing AFE7769DEVM With the Hitek Agilex eSOM7 FPGA | PDF | HTML | 28 Sep 2023 | |
Application note | Using AFE77xx in a Digital Pre-distortion System (Rev. B) | 02 Sep 2021 | ||
Application note | System Design Considerations when Upgrading from JESD204B to JESD204C (Rev. A) | 05 Apr 2021 | ||
Application note | Time Division Duplexing (TDD) in AFE77xx Integrated Transceiver (Rev. A) | 05 Apr 2021 | ||
Application note | AFE76xx, AFE77xx, and AFE79xx JESD204 Layer Testing | 15 Apr 2020 | ||
User guide | AFE77xx Latte GUI | 25 Jul 2019 | ||
Application note | Temp Profile to Maintain Optimum FIT Performance | 23 Jul 2019 | ||
Application note | Controlling Latte GUI from Python | 08 Jul 2019 | ||
Application note | AFE77xx Power Solutions | 25 Jun 2019 |
Design und Entwicklung
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HTK-3P-AGILEX-ESOM7 — HITEK Agilex eSOM7 with FMC+ connector to RF transceiver EVMs
The Hitek Systems eSOM7 interfaces with the AFE8092, AFE8030, AFE7952, and AFE7920 through an FPGA mezzanine card (FMC) connector. It provides a quick evaluation and prototyping platform for 5G wireless solutions based on Intel’s latest high-performance 10-nm Agilex F-Series FPGA.
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The Ultichip Communication Technology Blade40 is a low cost high performance PicoRU solution based on Ultichip's UC1046 DFE and TI's AFE7769 transceiver, supporting 4G LTE, 5G NR or 4/5G dual mode. Three models are available: Blade40-S3500 for 3.5-GHz band 5G NR 4T4R TDD mode, (...)
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The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
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